LLVM defines a virtual instruction set that is similar to RISC machines but provides rich type information and data flow information. This allows, on the one hand, sophisticated transformations of the object code, on the other hand, the information can be attached to the executable program. This allows further transformations during the link, at run time, and at the executable itself while the program is not running.
One of the biggest changes in LLVM 9 is that the RISC V architecture is no longer experimental. The basic instructions for RV32I and RV64I as well as the MAFDC extensions are supported. Both 32-bit and 64-bit support the hard-float and soft-float binary interfaces. What’s new in 64-bit ARM are Scalable Vector Extension 2 (SVE2) and Memory Tagging Extensions (MTE).
Submitted by: Arnfried Walbrecht
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